Packaged systems incorporating multiple die are receiving growing interest. Multi-die packages use die-to-die links to enable communication between die. A die-to-die link must typically support very large aggregate data bandwidth and favors a forwarded-clock parallel bus architecture given the connectivity density enabled by new advanced package technologies.
Some conventional systems include an architecture in which each die has a number of externally-exposed contacts (e.g., vias) that are used for data contacts. At least one other externally-exposed contact on each die would be used for a clock signal. Each of the data contacts is associated with some kind of sequential logic circuit, for example, a flip flop that either captures transmitted data or transmits stored data. On a transmit side, the clock is provided at the externally-exposed clock node and then transferred die to die to a receive-side clock node on the other die.
Such conventional architecture may include placing flip-flops directly underneath or in the very near vicinity of their respective contacts. The flip-flops are then clocked by a clock tree at each die. The externally-exposed contacts are arranged in an array that may cover a relatively large surface area of each die. Thus, the clock trees may be relatively large because they each distribute the clock over an area consistent with the size of its respective array of contacts. In other words, in such prior art systems, the sequential logic circuits are not localized, but are rather distributed over the area of the array of contacts.
However, the clock trees in systems including distributed flip-flops may require using longer metal traces for some bits, thereby increasing the total amount of metal and capacitance, hence power consumption, in the clock tree as a whole. There is thus a need in the art for improved die-to-die interfaces.